Physical Deisgn Engineer

We are eagerly looking for a good, qualified SOC physical design engineer

Job Title: Physical design engineer

Introduction to the company

The company was launched with the vision of “Leading advanced technology with system semiconductors” mainly targeting AI driving SOC, Mega MCU, and Gateway SOC for the computation and network domain. We aim to provide world top solutions that includes the design of semiconductors and the software. The initial funding to move forward is already secured and additional follow-up funding is scheduled. All current members are from well-known global big semiconductor companies. HQ is in Singapore, and we are setting up an engineering R& center in Vietnam to develop semiconductor, IC design and firmware for the AI SOCs.

Main Responsibilities

• Physical design (Front end)
  • Static timing analysis and timing closure
  • Low power rule (UPF) verification and implementation
  • LDRC, Formal verification, Dynamic simulation
  • DFT structure design and verification
  • Off chip PSI analysis and system guide
• Physical design (Back end)
  • SoC P&R (Floorplan/CTS/Timing analysis)
  • On-chip PSI analysis
  • CPU hardening
  • Physical verification

This is an exciting chance to push boundaries and make a real impact. Think you're the right fit or know someone who is? Apply today or reach out directly to join our journey in shaping the future of IP design!

**Location**: NBIV Semiconductor, Ho Chi Minh City, Vietnam.

Career Qualifications

• Must have extensive experience of P&R, CTS, PI/SI and timing analysis
• 4+ years of experience in related work

Preferred Qualifications

• Experience in physical verification
• Experience in physical design of a large SOC
• Experience in developing script (TCL, Python)
• Experience in off-chip PSI analysis of high speec, high power SOC