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Tính chất công việc
Full-time
Vị trí/chức vụ
Nhân Viên/Chuyên Viên
Ngày đăng tuyển
30/07/2020
Yêu cầu bằng cấp (tối thiểu)
Đại Học
Yêu cầu kinh nghiệm
3 - 5 năm
Yêu cầu ngôn ngữ
Địa điểm làm việc
⇒ Quận 1 Hồ Chí Minh, Việt Nam
Việc làm Hồ Chí Minh- Be part of a tech team that designs, develops and optimizes FPGA solutions for automated trading systems
- Communicate with traders, define requirements and come up with innovative, efficient and smart trading solutions
- Research new technologies and new hardware platforms
Sex: Any
Age: Any
Education level: Any
Language: Intermediate English (vì sẽ làm việc trực tiếp và chung với team bên Sing nên cần phải giao tiếp tốt tiếng Anh)
No.of experienced year: 3 - 4 years of experience
Key Experience:
- Strong FPGA design experience
- Experience on timing closure design
- Good understanding of the FPGA design cycle
- Experience on SystemVerilog/Verilog programming
- Strong experience on FPGA development tools (Altera or Xilinx) and simulation tools (Modelsim…)
- Hardware-software codesign
- Good knowledge on network protocols, specially Ethernet, ARP, IP, TCP and UDP
- Good C/C++ knowledge
- Familiarity with s, Tcl, python, perl
- Good knowledge of technical architecture design, including tools and components, to reasonably argue for and against all components in that architecture
Lưu ý: Họ không sử dụng HLS. Vì vậy, hdl (verilog hoặc systemverilog) sẽ phù hợp hơn.
■WORKING CONDITION
Working time:Mon-Fri :9:00-18:00
■Other Benefits:
- 13th month salary & performance review
- Governmental insurances based on labour law (after probation)
- 100% of salary in the probation time (Included Personal income tax)
- 15 days of annual leave apart from national holidays by law
- Childcare leave:
+ 2 days of childcare leave a year (With the company for at least 3 continuous months)
+ 6 days of paid childcare leave per year, regardless of the number of children you have (With the company for at least 1 year).
+ Only be applicable for employees with children below 7 years old.
- Marriage Leave
- Maternity/Paternity leave: based on Labour law
- Off in lieu:
+ For working 4 hours or less on a weekend/non-trading day, you will be granted time off in lieu of 4 hours on a working day.
+ For working more than 4 hours on a weekend/non-trading day, you will be granted a full day off on a working day.
Innovation leave: staff allowed to take up to 20% of their work time to work on innovation or training. Innovation idea has to be posted on Innovation Board on Jira before taking of leave.
- Out-patient and hospitalisation health insurance package (applicable also to spouse and/or children where required)
- Annual dental care package
- Working equipment provided (laptop, extra monitor, etc)
- Motorcycle parking fee allowance
- Casual dress code
- Flexible work time arrangement where applicable
- Team building activities, happy-hour, etc.
- An employee will be granted a Referral Bonus of VND 10,000,000 for every referral who is hired and completes 12 months of employment.
- Opportunity to work with talented colleagues to improve your knowledge. Professional & English speaking working environment and more...
■INTERVIEW PROCESS:
+ Test
+ Interview (Online in this June)
Trừ FPGA Developer chỉ Interview thôi.
57 Nguyễn Văn Giai, Đa Kao, Quận 1, Hồ Chí Minh, Việt Nam
50-100 nhân viên
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